1. Field of the Invention
The present invention relates to a semiconductor memory device, and in particular, to a wiring (conductive line) layout pattern structure.
2. Description of the Related Art
A semiconductor memory device, for example, NAND-type flash memory is mainly composed of memory cell array and peripheral circuit arranged at the peripheral portion of the memory cell array.
The memory cell array and sense amplifier circuit and row decoder circuit forming the peripheral circuit are connected via a bit line or word line (e.g., refer to Jpn. Pat. Appin. KOKAI Publication No. 2006-60133).
For example, a line pitch of a bit line led from the memory cell array is reduced because of high integration of the memory cell array. On the other hand, a design rule is gently designed in the peripheral circuit. Therefore, a line pitch of the bit line led from the peripheral circuit is increased.
For this reason, the bit line has the following structure. Namely, the line pitch is increased using a lead portion while extending from the memory cell array toward the sense amplifier circuit.
In general, a wiring pattern of the bit line is formed on a chip in the following manner. The wiring pattern has a wiring layout such that neighboring wiring regions achieves right and left symmetry. Then, the wiring pattern is formed on the chip based on a glass mask made via electron beam exposure.
The bit line is formed on the chip while the line pitch is converted. In this case, the wiring pattern is mainly designed based on linear wiring using rectangular electron beam shot (hereinafter, referred to as rectangular EB shot). However, for convenience of design, the wiring pattern is designed using inclined lines formed using triangular EB shot.
In the wiring layout achieving right and left symmetry, right and left symmetry lithography pattern must be used for the triangular shot. In this case, in neighboring wiring areas, an inclined line has a positional shift, and is variable due to dimensional difference. As a result, it is difficult to form a wiring pattern having full right and left symmetry. Moreover, the difference between right and left of the wiring pattern occurs, and thereby, stable drive characteristic of the memory cell array is not obtained.
Recently, with the scale-down of the memory cell array, variations of the wiring pattern on the glass mask must be considered. This is because the foregoing variations give an influence to the operation of a NAND-type flash memory.